[Jun/29/98]

                GAPLUS    BALLY
Version 1 is on a board about 15 X 17", ver 2&3 about 12 X 15"

Uses three 68A09EP cpu's

All roms are 2764

NAME     POSITION   VERSION 2    VERSION 3
-------------------------------------------
GP2-1    7B         4B           4B
GP2-10   5L         11N          11N
GP2-11   5M         11P          11P
GP2-12   5K         11R          11R
GP2-5    9L         8S           8S
GP2-9    5N         11M          11M
M1       9E         8D
M2       9D         8C
M3       9C         8B
M4       6N         11B
M5       6M         11C
M6       6L         11D
PAL10L8  8N       
82S129   4F       
82S131   3F       
82S131   3E       
82S126   2D       
82S126   1D       
82S126   1C       

GP2-4                            8D
GP2-3B                           8C
GP2-2B                           8B
GP2-6                            11B
GP2-7                            11C
GP2-8                            11D

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[Sep/02/2002]

Gaplus Rev D by Namco

Roms correct naming and location informations :

Bproms :

Gp2-1.1n
Gp2-2.2n
Gp2-3.1p
Gp2-4.3f
Gp2-5.6n
Gp2-6.6p
Gp2-7.6s

Eproms :

Gp2-1.4b
Gp3-2D.8b
Gp3-3C.8c
Gp3-4C.8d
Gp2-5.8s
Gp3-6B.11b
GP2-7.11c
Gp3-8b.11d
Gp2-9.11m
Gp2-10.11n
Gp2-11.11p
Gp2-12.11r

Provided on 31/08/2002.


[Apr/09/2000]

Gaplus clone

Galaga3 (alternative romset)
(C) Namco 1984

This appears to be a newer revision of the program roms. (except GP2-7.BIN)
GFX roms and proms not included in this archive as they are the same as the existing dumps.

-

[Apr/25/2001]

Archive:  ./gaplus.zip
 Length  Method   Size  Ratio   Date    Time   CRC-32     Name
 ------  ------   ----  -----   ----    ----   ------     ----
    256  Defl:X     127  50%  07-29-97  16:16  2d9fbdd8   GP2-3F.BIN
    256  Defl:X      42  84%  07-27-97  11:48  2faa3e09   GP2-6S.BIN
      0  Stored       0   0%  03-28-99  18:15  00000000   GAPLUS/
    512  Defl:X     204  60%  03-28-99  17:23  6f99c2da   GAPLUS/GP2-6P.BIN
    512  Defl:X     142  72%  07-27-97  11:51  c7d31657   GAPLUS/GP2-6N.BIN
      0  Stored       0   0%  03-28-99  18:15  00000000   GAPLUS/SET1/
   8192  Defl:X    4721  42%  01-18-94  10:40  69fdfdb7   GAPLUS/SET1/GP2-2.64
   8192  Defl:X    5546  32%  01-18-94  10:41  a74b0266   GAPLUS/SET1/GP2-3.64
   8192  Defl:X    4182  49%  01-18-94  10:41  484f11e0   GAPLUS/SET1/GP2-4.64
   8192  Defl:X    5415  34%  01-18-94  10:42  14cd61ea   GAPLUS/SET1/GP2-6.64
   8192  Defl:X    5669  31%  01-18-94  10:43  bff601a6   GAPLUS/SET1/GP2-8.64
   8192  Defl:X    2431  70%  01-18-94  10:42  f3d19987   GAPLUS/GP2-5.64
      0  Stored       0   0%  03-28-99  18:15  00000000   GAPLUS/SET2/
   8192  Defl:X    4719  42%  05-06-98  17:12  b3cb90db   GAPLUS/SET2/GP2-2B.8B
   8192  Defl:X    5541  32%  10-11-97  15:32  d77840a4   GAPLUS/SET2/GP2-3B.8C
   8192  Defl:X    4181  49%  10-11-97  15:30  e525d75d   GAPLUS/SET2/GP2-4.8D
   8192  Defl:X    5414  34%  10-11-97  15:26  75b18652   GAPLUS/SET2/GP2-6.11B
   8192  Defl:X    5668  31%  10-11-97  15:26  42b9fd7c   GAPLUS/SET2/GP2-8.11D
    980  Defl:X     346  65%  06-29-98  14:23  9e03c51f   GAPLUS/SET2/READ
    256  Defl:X      89  65%  07-27-97  11:47  a5091352   GP2-1P.BIN
    256  Defl:X      87  66%  07-27-97  11:48  8bc8022a   GP2-1N.BIN
    256  Defl:X      80  69%  07-27-97  11:46  8dabc20b   GP2-2N.BIN
   8192  Defl:X    3994  51%  01-18-94  10:39  ed8aa206   GP2-1.64
   8192  Defl:X    5037  39%  01-18-94  10:44  6cd8ce11   GP2-10.64
   8192  Defl:X    4401  46%  01-18-94  10:45  57740ff9   GP2-11.64
   8192  Defl:X    2918  64%  01-18-94  10:45  7316a1f1   GP2-12.64
   8192  Defl:X    3890  53%  01-18-94  10:43  0621f7df   GP2-7.64
   8192  Defl:X    5212  36%  01-18-94  10:44  e6a9ae67   GP2-9.64
      0  Stored       0   0%  03-28-99  18:15  00000000   GALAGA3/
    512  Defl:X     141  73%  12-13-97  12:09  417ba0dc   GALAGA3/G3_3E.BIN
    512  Defl:X     203  60%  12-13-97  12:09  d48c0eef   GALAGA3/G3_3F.BIN
   8192  Defl:X    5673  31%  12-13-97  12:09  9ec3dce5   GALAGA3/GAL3_6L.BIN
   8192  Defl:X    5404  34%  12-13-97  12:09  6a2942c5   GALAGA3/GAL3_6N.BIN
   8192  Defl:X    4450  46%  12-13-97  12:09  f1b00073   GALAGA3/GAL3_9C.BIN
   8192  Defl:X    5482  33%  12-13-97  12:09  86fac687   GALAGA3/GAL3_9D.BIN
      0  Stored       0   0%  03-28-99  18:15  00000000   GALAGA3/SET1/
   8192  Defl:X    4109  50%  12-13-97  12:09  f4845e7f   GALAGA3/SET1/GAL3_9E.BIN
   8192  Defl:X    3894  53%  12-13-97  12:09  8d4dcebf   GALAGA3/GAL3_9L.BIN
      0  Stored       0   0%  03-28-99  18:15  00000000   GALAGA3/SET2/
   8192  Defl:X    4122  50%  01-10-98  06:35  e392704e   GALAGA3/SET2/MI.9E
    725  Defl:X     257  65%  01-13-98  03:53  144a149f   GALAGA3/SET2/READ
    582  Defl:X     186  68%  06-29-98  14:08  a0592885   PAL10L8.8N
 ------          ------  ---                              -------
 202223          113977  44%                              42 files

-

[MAME]

Custom ICs:
----------
11XX     gfx data shifter and mixer (16-bit in, 4-bit out) [1]
15XX     sound control
16XX     I/O control
CUS20    tilemap and sprite address generator
CUS21    sprite generator
CUS26    starfield generator
CUS29    sprite line buffer and sprite/tilemap mixer
CUS33    timing generator
CUS34    address decoder
56XX     I/O
58XX     I/O
CUS62    I/O and explosion generator
98XX     lamp/coin output
99XX     sound volume


memory map
----------
Most of the address decoding for main and sound CPU is done by a custom IC (34XX),
so the memory map is largely deducted by program behaviour. The 34XX also handles
internally the main and sub irq, and a watchdog.
Most of the address decoding for sub CPU is done by a PAL which was read and
decoded, but there are some doubts about its validity.
There is also some additional decoding for tile/sprite RAM done by the 20XX
tilemap and sprite address generator.

Note: chip positions are based on the Midway version schematics. The Namco
version has a different layout (see later for the known correspondencies)

MAIN CPU:

Address          Dir Data     Name      Description
---------------- --- -------- --------- -----------------------
00000xxxxxxxxxxx R/W xxxxxxxx RAM 9J    tilemap RAM (shared with sub CPU)
00001xxxxxxxxxxx R/W xxxxxxxx RAM 3M    work RAM (shared with sub CPU)
000011111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (sprite number & color)
00010xxxxxxxxxxx R/W xxxxxxxx RAM 3K    work RAM (shared with sub CPU)
000101111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (x, y)
00011xxxxxxxxxxx R/W xxxxxxxx RAM 3L    work RAM (shared with sub CPU)
000111111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (x msb, flip, size)
01100-xxxxxxxxxx R/W xxxxxxxx SOUND     RAM (shared with sound CPU)
01101-----xxxxxx R/W ----xxxx FBIT      I/O chips
0111x-----------   W --------           main CPU irq enable (data is in A11) (MIRQ generated by 34XX)
01111----------- R   --------           watchdog reset (MRESET generated by 34XX)
1000x-----------   W -------- SRESET    reset sub and sound CPU, sound enable (data is in A11) (latch in 34XX)
1001x-----------   W -------- FRESET    reset I/O chips (data is in A11) (latch in 34XX)
10100---------xx   W xxxxxxxx STWR      to custom 26XX (starfield control)
10-xxxxxxxxxxxxx R   xxxxxxxx ROM 9E	program ROM (can optionally be a 27128)
110xxxxxxxxxxxxx R   xxxxxxxx ROM 9D	program ROM
111xxxxxxxxxxxxx R   xxxxxxxx ROM 9C	program ROM

[1] Program uses addresses with A10 = 1, e.g. 7400, 7c00, but A10 is not used.
On startup, it also writes to 7820-782f. This might be a bug, the intended range
being 6820-682f to address the 3rd I/O chip.


SOUND CPU:

Address          Dir Data     Name      Description
---------------- --- -------- --------- -----------------------
000---xxxxxxxxxx R/W xxxxxxxx SOUND2    RAM (shared with main CPU)
001------------- R/W --------           watchdog reset? (34XX) [1]
01x-------------   W --------           sound CPU irq enable (data is in A13) (SIRQ generated by 34XX)
11-xxxxxxxxxxxxx R   xxxxxxxx ROM 7B	program ROM (can optionally be a 27128)

[1] Program writes to 3000 and on startup reads from 3000.
On startup it also writes to 2007, but there doesn't seem to be anything else there.


SUB CPU:

Address          Dir Data     Name      Description
---------------- --- -------- --------- -----------------------
00000xxxxxxxxxxx R/W xxxxxxxx RAM 9J    tilemap RAM (shared with main CPU)
00001xxxxxxxxxxx R/W xxxxxxxx RAM 3M    work RAM (shared with main CPU)
000011111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (sprite number & color)
00010xxxxxxxxxxx R/W xxxxxxxx RAM 3K    work RAM (shared with main CPU)
000101111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (x, y)
00011xxxxxxxxxxx R/W xxxxxxxx RAM 3L    work RAM (shared with main CPU)
000111111xxxxxxx R/W xxxxxxxx           portion holding sprite registers (x msb, flip, size)
0110-----------x     -------- VINTON    sub CPU irq enable (data is in A0) [1]
10-xxxxxxxxxxxxx R   xxxxxxxx ROM 6L	program ROM (can optionally be a 27128)
110xxxxxxxxxxxxx R   xxxxxxxx ROM 6M	program ROM
111xxxxxxxxxxxxx R   xxxxxxxx ROM 6N	program ROM

[1] Program normally uses 6080/6081, but 6001 is written on startup.
500F is also written on startup, whose meaning is unknown.


ROM chip placements
-------------------
Midway	Namco
------	-----
9C		8B
9D		8C
9E		8D
6N		11B
6M		11C
6L		11D
7B		4B
9L		8S
5K		11R
5L		11N
5M		11P
5N		11M

-