                    ---===== RSRSNes Hacking Log=====---
                              Updated 1/6/97

This doc is by no means complete or fully accurate.  I mainly wrote it so I
wouldn't forget anything.  It contains my notes on SNES hardware, and is a
compendum to Yoshi's famous SNES docs.  Many facets of the SNES are still 
poorly documented, and as I resolve issues pertinate to emulating the SNES,
I'll describe them here.
                                                -Grog

DMA Transfer modes:
  Yoshi's doc lists the transfer modes exactly as the original Nintendo docs.
  The descriptions arn't particularly clear, so here's my (somewhat tested)
  take on them.  Below, a R indicates a Read and read address update.
  Address update on a read is dependent on c and b below.  A W+ indicates
  a Write and write address increment.  W- Writes and decrements the write
  address.  Plain W does not change the Write address.
$43x0    vh0cbaaa      a: transfer type:
                        000 = R W R W
                        001 = R W+ R W-
                        010 = R W
                        011 = R W R W+ R W R W-
                        100 = R W+ R W+ R W+ R W---

VRAM Addresses (as seen via $2116-$2119):
  Addresses are to WORDS, not bytes.  Thus, VRAM is potentially 128k rather
  than 64k (in terms of raw addressing space)  I'm not sure at this point
  whether there is 64k or 128k of physical VRAM.  Emulating extra can't hurt.

NMI and NMI flags:
  The VSync signal not only triggers a NMI interrupt (maskable by bit 7 of
  $4200), but sets bit 7 of $4210.  Some programs use this rather than the
  NMI to detect vertical retrace, so both must be emulated properly.

Graphics mode 0 palette:  In mode 0, each BG has an independent palette
independent of the palette bits of the SC map.  BG0=0xh, BG1=2xh, etc.
