Logic

Signal Name Total Pterms Total Inputs Function Block Macrocell Power Mode Slew Rate Pin Number Pin Type Pin Use Reg Init State
OUT1_reg<0> 8 19 FB2 MC15 STD FAST 6 I/O O RESET
OUT1_reg<1> 8 19 FB2 MC12 STD FAST 4 I/O O RESET
$OpTx$FX_DC$41 4 7 FB1 MC18 STD     (b) (b)  
$OpTx$FX_SC$45 2 17 FB4 MC1 STD     (b) (b)  
$OpTx$$OpTx$FX_DC$40_INV$431 1 3 FB3 MC2 STD   22 I/O I  
$OpTx$$OpTx$FX_DC$42_INV$432 4 17 FB4 MC5 STD   44 I/O I  
bus_cnt<0> 2 4 FB1 MC1 STD     (b) (b) RESET
bus_cnt<1> 3 5 FB1 MC7 STD     (b) (b) RESET
comms_data 3 14 FB1 MC6 STD   10 I/O I RESET
cts_out 3 14 FB4 MC8 STD FAST 45 I/O O RESET
data_out 3 14 FB1 MC5 STD   9 I/O I RESET
edge_romcs 2 4 FB3 MC9 STD FAST 27 I/O O  
fastpage<0> 4 16 FB1 MC13 STD     (b) (b) RESET
fastpage<1> 4 16 FB1 MC12 STD   23 I/O I RESET
fastpage<2> 3 14 FB4 MC3 STD   46 I/O I RESET
flashwrite 3 17 FB2 MC13 STD     (b) (b) RESET
memory_bank<0> 6 19 FB4 MC6 STD FAST 49 I/O O RESET
memory_bank<1> 3 14 FB1 MC2 STD FAST 8 I/O O RESET
memory_bank<2> 3 14 FB2 MC17 STD FAST 7 I/O O RESET
memory_bank<3> 4 15 FB2 MC3 STD FAST 58 I/O I/O RESET
memory_bank<4> 4 15 FB2 MC9 STD FAST 64 I/O/GSR I/O RESET
net_out 1 2 FB4 MC11 STD FAST 48 I/O O  
nmi_enable 9 19 FB2 MC6 STD   62 I/O I RESET
ram_cs 2 9 FB1 MC17 STD FAST 20 I/O O  
rom_cs 2 9 FB2 MC5 STD FAST 61 I/O O  
rs_232out 1 2 FB4 MC15 STD FAST 56 I/O O  
rx_register<0> 2 6 FB3 MC11 STD   33 I/O I RESET
rx_register<1> 2 6 FB3 MC10 STD   39 I/O I RESET
rx_register<2> 2 6 FB3 MC8 STD   25 I/O I RESET
rx_register<3> 2 6 FB3 MC7 STD     (b) (b) RESET
rx_register<4> 2 6 FB3 MC6 STD   34 I/O I RESET
rx_register<5> 2 6 FB3 MC5 STD   24 I/O I RESET
rx_register<6> 2 6 FB3 MC4 STD   32 I/O I RESET
rx_register<7> 2 6 FB3 MC3 STD   31 I/O I RESET
shift<0> 5 7 FB4 MC18 STD     (b) (b) RESET
shift<1> 5 7 FB3 MC18 STD     (b) (b) RESET
shift<2> 5 7 FB3 MC16 STD   42 I/O I RESET
shift<3> 5 7 FB3 MC15 STD   36 I/O I RESET
shift<4> 5 7 FB3 MC14 STD   35 I/O I RESET
shift<5> 5 7 FB3 MC13 STD     (b) (b) RESET
shift<6> 5 7 FB3 MC12 STD   40 I/O I RESET
spi_clock 2 2 FB2 MC11 STD FAST 2 I/O/GTS2 O RESET
spi_dataout 4 18 FB2 MC14 STD FAST 5 I/O/GTS1 O RESET
spi_tx<0> 6 18 FB2 MC7 STD     (b) (b) RESET
spi_tx<1> 5 18 FB2 MC8 STD   63 I/O I RESET
spi_tx<2> 4 18 FB2 MC10 STD   1 I/O I RESET
spi_tx<3> 3 18 FB2 MC16 STD     (b) (b) RESET
tx_register<0> 4 18 FB4 MC4 STD   47 I/O I RESET
tx_register<1> 5 10 FB4 MC17 STD   57 I/O I RESET
tx_register<2> 5 10 FB4 MC16 STD     (b) (b) RESET
tx_register<3> 5 10 FB4 MC13 STD     (b) (b) RESET
tx_register<4> 5 10 FB4 MC12 STD   52 I/O I RESET
tx_register<5> 5 10 FB4 MC10 STD   51 I/O I RESET
tx_register<6> 5 10 FB4 MC9 STD     (b) (b) RESET
tx_register<7> 5 10 FB4 MC7 STD     (b) (b) RESET
wait_cnt<0> 4 16 FB1 MC11 STD   16 I/O/GCK2 GCK RESET
wait_cnt<1> 3 16 FB1 MC3 STD   12 I/O I RESET
z80_databus<0> 14 16 FB1 MC15 STD FAST 19 I/O I/O  
z80_databus<1> 4 15 FB1 MC10 STD FAST 18 I/O I/O  
z80_databus<2> 4 15 FB1 MC14 STD FAST 17 I/O/GCK3 I/O  
z80_databus<3> 14 16 FB1 MC9 STD FAST 15 I/O/GCK1 I/O  
z80_databus<4> 4 15 FB1 MC4 STD FAST 13 I/O I/O  
z80_databus<5> 3 13 FB4 MC14 STD FAST 50 I/O I/O  
z80_databus<6> 3 13 FB2 MC4 STD FAST 59 I/O I/O  
z80_databus<7> 13 15 FB2 MC2 STD FAST 60 I/O I/O  
z80_nmi 1 2 FB4 MC2 STD FAST 43 I/O O  
z80_wait 1 2 FB3 MC17 STD FAST 38 I/O O