DFF000	BLTDDAT	E	O	Blitter dest. early read (dummy address)
DFF002	DMACONR	R	O	Dma control (and blitter status) read
DFF004	VPOSR	R	O	Read vertical most sig. bits (and frame flop)
DFF006	VHPOSR	R	O	Read vert and horiz position of beam
DFF008	DSKDATR	E	O	Disk data early read (dummy address)
DFF00A	JOY0DAT	R	O	Joystick-mouse 0 data (vert, horiz)
DFF00C	JOY1DAT	R	O	Joystick-mouse 1 data (vert, horiz)
DFF00E	CLXDAT	R	O	Collision data reg. (read and clear)
DFF010	ADKCONR	R	O	Audio, disk control register read
DFF012	POT0DAT	R	O	Pot counter data left pair (vert, horiz)
DFF014	POT1DAT	R	O	Pot counter data right pair (vert, horiz)
DFF016	POTINP	R	O	Pot pin data read
DFF018	SERDATR	R	O	Serial port data and status read
DFF01A	DSKBYTR	R	O	Disk data byte and status read
DFF01C	INTENAR	R	O	Interrupt enable bits read
DFF01E	INTREQR	R	O	Interrupt request bits read
DFF020	DSKPTH	W	O	Disk pointer (high 5 bits (OCS: 3 bits))
DFF022	DSKPTL	W	O	Disk pointer (low 15 bits)
DFF024	DSKLEN	W	O	Disk length
DFF026	DSKDAT	W	O	Disk DMA data write
DFF028	REFPTR	W	O	Refresh pointer
DFF02A	VPOSW	W	O	Write vert most sig. bits (and frame flop)
DFF02C	VHPOSW	W	O	Write vert and horiz pos of beam
DFF02E	COPCON	W	O	Coprocessor control
DFF030	SERDAT	W	O	Serial port data and stop bits write
DFF032	SERPER	W	O	Serial port period and control
DFF034	POTGO	W	O	Pot count start,pot pin drive enable data
DFF036	JOYTEST	W	O	Write to all 4 joystick-mouse counters at once
DFF038	STREQU	S	O	Strobe for horiz sync with VB and EQU
DFF03A	STRVBL	S	O	Strobe for horiz sync with VB (vert blank)
DFF03C	STRHOR	S	O	Strobe for horiz sync
DFF03E	STRLONG	S	O	Strobe for identification of long horiz line
DFF040	BLTCON0	W	O	Blitter control register 0
DFF042	BLTCON1	W	O	Blitter control register 1
DFF044	BLTAFWM	W	O	Blitter first word mask for source A
DFF046	BLTALWM	W	O	Blitter last word mask for source A
DFF048	BLTCPTH	W	O	Blitter pointer to source C (high 5 bits (OCS: 3 bits))
DFF04A	BLTCPTL	W	O	Blitter pointer to source C (low 15 bits)
DFF04C	BLTBPTH	W	O	Blitter pointer to source B (high 5 bits (OCS: 3 bits))
DFF04E	BLTBPTL	W	O	Blitter pointer to source B (low 15 bits)
DFF050	BLTAPTH	W	O	Blitter pointer to source A (high 5 bits (OCS: 3 bits))
DFF052	BLTAPTL	W	O	Blitter pointer to source A (low 15 bits)
DFF054	BLTDPTH	W	O	Blitter pointer to dest D (high 5 bits (OCS: 3 bits))
DFF056	BLTDPTL	W	O	Blitter pointer to dest D (low 15 bits)
DFF058	BLTSIZE	W	O	Blitter start and size (win/width,height)
DFF05A	BLTCON0L	W	E	Blitter control 0, lower 8 bits (minterms)
DFF05C	BLTSIZV	W	E	Blitter V size (for 15 bit vertical size)
DFF05E	BLTSIZH	W	E	Blitter H size and start (for 11 bit H size)
DFF060	BLTCMOD	W	O	Blitter modulo for source C
DFF062	BLTBMOD	W	O	Blitter modulo for source B
DFF064	BLTAMOD	W	O	Blitter modulo for source A
DFF066	BLTDMOD	W	O	Blitter modulo for dest D
DFF068	RESERVED	-	-	 
DFF06A	RESERVED	-	-	 
DFF06C	RESERVED	-	-	 
DFF06E	RESERVED	-	-	 
DFF070	BLTCDAT	W	O	Blitter source C data register
DFF072	BLTBDAT	W	O	Blitter source B data register
DFF074	BLTADAT	W	O	Blitter source A data register
DFF076	RESERVED	-	-	 
DFF078	SPRHDAT	W	E	Ext. logic UHRES sprite pointer and data identifier
DFF07A	BPLHDAT	W	E	Ext. logic UHRES bit plane identifier
DFF07C	DENISEID	R	E	Chip revision level for Denise/Lisa (video out chip)
DFF07E	DSKSYNC	W	O	Disk sync pattern reg for disk read
DFF080	COP1LCH	W	O	Coprocessor 1st location (high 5 bits (OCS: 3 bits))
DFF082	COP1LCL	W	O	Coprocessor 1st location (low 15 bits)
DFF084	COP2LCH	W	O	Coprocessor 2nd location(high 5 bits (OCS: 3 bits))
DFF086	COP2LCL	W	O	Coprocessor 2nd location (low 15 bits)
DFF088	COPJMP1	S	O	Coprocessor restart at 1st location
DFF08A	COPJMP2	S	O	Coprocessor restart at 2nd location
DFF08C	COPINS	S	O	Coprocessor inst fetch identify
DFF08E	DIWSTRT	W	O	Display window start (upper left vert,horiz pos)
DFF090	DIWSTOP	W	O	Display window stop (lower right vert,horiz pos)
DFF092	DDFSTRT	W	O	Display bit plane data fetch start,horiz pos
DFF094	DDFSTOP	W	O	Display bit plane data fetch stop,horiz pos
DFF096	DMACON	W	O	DMA control write (clear or set)
DFF098	CLXCON	W	O	Collision control
DFF09A	INTENA	W	O	Interrupt enable bits (clear or set bits)
DFF09C	INTREQ	W	O	Interrupt request bits (clear or set bits)
DFF09E	ADKCON	W	O	Audio, disk,UART control
DFF0A0	AUD0LCH	W	O	Audio channel 0 location (high 5 bits (OCS: 3 bits))
DFF0A2	AUD0LCL	W	O	Audio channel 0 location (low 15 bits)
DFF0A4	AUD0LEN	W	O	Audio channel 0 length
DFF0A6	AUD0PER	W	O	Audio channel 0 period
DFF0A8	AUD0VOL	W	O	Audio channel 0 volume
DFF0AA	AUD0DAT	W	O	Audio channel 0 data
DFF0AC	RESERVED	-	-	 
DFF0AE	RESERVED	-	-	 
DFF0B0	AUD1LCH	W	O	Audio channel 1 location (high 5 bits (OCS: 3 bits))
DFF0B2	AUD1LCL	W	O	Audio channel 1 location (low 15 bits)
DFF0B4	AUD1LEN	W	O	Audio channel 1 length
DFF0B6	AUD1PER	W	O	Audio channel 1 period
DFF0B8	AUD1VOL	W	O	Audio channel 1 volume
DFF0BA	AUD1DAT	W	O	Audio channel 1 data
DFF0BC	RESERVED	-	-	 
DFF0BE	RESERVED	-	-	 
DFF0C0	AUD2LCH	W	O	Audio channel 2 location (high 5 bits (OCS: 3 bits))
DFF0C2	AUD2LCL	W	O	Audio channel 2 location (low 15 bits)
DFF0C4	AUD2LEN	W	O	Audio channel 2 length
DFF0C6	AUD2PER	W	O	Audio channel 2 period
DFF0C8	AUD2VOL	W	O	Audio channel 2 volume
DFF0CA	AUD2DAT	W	O	Audio channel 2 data
DFF0CC	RESERVED	-	-	 
DFF0CE	RESERVED	-	-	 
DFF0D0	AUD3LCH	W	O	Audio channel 3 location (high 5 bits (OCS: 3 bits))
DFF0D2	AUD3LCL	W	O	Audio channel 3 location (low 15 bits)
DFF0D4	AUD3LEN	W	O	Audio channel 3 length
DFF0D6	AUD3PER	W	O	Audio channel 3 period
DFF0D8	AUD3VOL	W	O	Audio channel 3 volume
DFF0DA	AUD3DAT	W	O	Audio channel 3 data
DFF0DC	RESERVED	-	-	 
DFF0DE	RESERVED	-	-	 
DFF0E0	BPL1PTH	W	O	Bitplane pointer 1 (high 5 bits (OCS: 3 bits))
DFF0E2	BPL1PTL	W	O	Bitplane pointer 1 (low 15 bits)
DFF0E4	BPL2PTH	W	O	Bitplane pointer 2 (high 5 bits (OCS: 3 bits))
DFF0E6	BPL2PTL	W	O	Bitplane pointer 2 (low 15 bits)
DFF0E8	BPL3PTH	W	O	Bitplane pointer 3 (high 5 bits (OCS: 3 bits))
DFF0EA	BPL3PTL	W	O	Bitplane pointer 3 (low 15 bits)
DFF0EC	BPL4PTH	W	O	Bitplane pointer 4 (high 5 bits (OCS: 3 bits))
DFF0EE	BPL4PTL	W	O	Bitplane pointer 4 (low 15 bits)
DFF0F0	BPL5PTH	W	O	Bitplane pointer 5 (high 5 bits (OCS: 3 bits))
DFF0F2	BPL5PTL	W	O	Bitplane pointer 5 (low 15 bits)
DFF0F4	BPL6PTH	W	O	Bitplane pointer 6 (high 5 bits (OCS: 3 bits))
DFF0F6	BPL6PTL	W	O	Bitplane pointer 6 (low 15 bits)
DFF0F8	BPL7PTH	W	A	Bitplane pointer 7 (high 5 bits (OCS: 3 bits))
DFF0FA	BPL7PTL	W	A	Bitplane pointer 7 (low 15 bits)
DFF0FC	BPL8PTH	W	A	Bitplane pointer 8 (high 5 bits (OCS: 3 bits))
DFF0FE	BPL8PTL	W	A	Bitplane pointer 8 (low 15 bits)
DFF100	BPLCON0	W	O	Bitplane control (miscellaneous control bits)
DFF102	BPLCON1	W	O	Bitplane control (scroll value)
DFF104	BPLCON2	W	O	Bitplane control (video priority control)
DFF106	BPLCON3	W	O	Bitplane control (enhanced features)
DFF108	BPL1MOD	W	O	Bitplane modulo (odd planes)
DFF10A	BPL2MOD	W	O	Bitplane modulo (even planes)
DFF10C	BPLCON4	W	A	Bitplane control (bitplane and sprite-masks)
DFF10E	CLXCON2	W	A	Extended collision control
DFF110	BPL1DAT	W	O	Bitplane 1 data (parallel to serial convert)
DFF112	BPL2DAT	W	O	Bitplane 2 data (parallel to serial convert)
DFF114	BPL3DAT	W	O	Bitplane 3 data (parallel to serial convert)
DFF116	BPL4DAT	W	O	Bitplane 4 data (parallel to serial convert)
DFF118	BPL5DAT	W	O	Bitplane 5 data (parallel to serial convert)
DFF11A	BPL6DAT	W	O	Bitplane 6 data (parallel to serial convert)
DFF11C	BPL7DAT	W	A	Bitplane 7 data (parallel to serial convert)
DFF11E	BPL8DAT	W	A	Bitplane 8 data (parallel to serial convert)
DFF120	SPR0PTH	W	O	Sprite 0 pointer (high 5 bits (OCS: 3 bits))
DFF122	SPR0PTL	W	O	Sprite 0 pointer (low 15 bits)
DFF124	SPR1PTH	W	O	Sprite 1 pointer (high 5 bits (OCS: 3 bits))
DFF126	SPR1PTL	W	O	Sprite 1 pointer (low 15 bits)
DFF128	SPR2PTH	W	O	Sprite 2 pointer (high 5 bits (OCS: 3 bits))
DFF12A	SPR2PTL	W	O	Sprite 2 pointer (low 15 bits)
DFF12C	SPR3PTH	W	O	Sprite 3 pointer (high 5 bits (OCS: 3 bits))
DFF12E	SPR3PTL	W	O	Sprite 3 pointer (low 15 bits)
DFF130	SPR4PTH	W	O	Sprite 4 pointer (high 5 bits (OCS: 3 bits))
DFF132	SPR4PTL	W	O	Sprite 4 pointer (low 15 bits)
DFF134	SPR5PTH	W	O	Sprite 5 pointer (high 5 bits (OCS: 3 bits))
DFF136	SPR5PTL	W	O	Sprite 5 pointer (low 15 bits)
DFF138	SPR6PTH	W	O	Sprite 6 pointer (high 5 bits (OCS: 3 bits))
DFF13A	SPR6PTL	W	O	Sprite 6 pointer (low 15 bits)
DFF13C	SPR7PTH	W	O	Sprite 7 pointer (high 5 bits (OCS: 3 bits))
DFF13E	SPR7PTL	W	O	Sprite 7 pointer (low 15 bits)
DFF140	SPR0POS	W	O	Sprite 0 vert,horiz start pos data
DFF142	SPR0CTL	W	O	Sprite 0 position and control data
DFF144	SPR0DATA	W	O	Sprite 0 image data register A
DFF146	SPR0DATB	W	O	Sprite 0 image data register B
DFF148	SPR1POS	W	O	Sprite 1 vert,horiz start pos data
DFF14A	SPR1CTL	W	O	Sprite 1 position and control data
DFF14C	SPR1DATA	W	O	Sprite 1 image data register A
DFF14E	SPR1DATB	W	O	Sprite 1 image data register B
DFF150	SPR2POS	W	O	Sprite 2 vert,horiz start pos data
DFF152	SPR2CTL	W	O	Sprite 2 position and control data
DFF154	SPR2DATA	W	O	Sprite 2 image data register A
DFF156	SPR2DATB	W	O	Sprite 2 image data register B
DFF158	SPR3POS	W	O	Sprite 3 vert,horiz start pos data
DFF15A	SPR3CTL	W	O	Sprite 3 position and control data
DFF15C	SPR3DATA	W	O	Sprite 3 image data register A
DFF15E	SPR3DATB	W	O	Sprite 3 image data register B
DFF160	SPR4POS	W	O	Sprite 4 vert,horiz start pos data
DFF162	SPR4CTL	W	O	Sprite 4 position and control data
DFF164	SPR4DATA	W	O	Sprite 4 image data register A
DFF166	SPR4DATB	W	O	Sprite 4 image data register B
DFF168	SPR5POS	W	O	Sprite 5 vert,horiz start pos data
DFF16A	SPR5CTL	W	O	Sprite 5 position and control data
DFF16C	SPR5DATA	W	O	Sprite 5 image data register A
DFF16E	SPR5DATB	W	O	Sprite 5 image data register B
DFF170	SPR6POS	W	O	Sprite 6 vert,horiz start pos data
DFF172	SPR6CTL	W	O	Sprite 6 position and control data
DFF174	SPR6DATA	W	O	Sprite 6 image data register A
DFF176	SPR6DATB	W	O	Sprite 6 image data register B
DFF178	SPR7POS	W	O	Sprite 7 vert,horiz start pos data
DFF17A	SPR7CTL	W	O	Sprite 7 position and control data
DFF17C	SPR7DATA	W	O	Sprite 7 image data register A
DFF17E	SPR7DATB	W	O	Sprite 7 image data register B
DFF180	COLOR00	W	O	Color table 0, color of background & borders
DFF182	COLOR01	W	O	Color table 1
DFF184	COLOR02	W	O	Color table 2
DFF186	COLOR03	W	O	Color table 3
DFF188	COLOR04	W	O	Color table 4
DFF18A	COLOR05	W	O	Color table 5
DFF18C	COLOR06	W	O	Color table 6
DFF18E	COLOR07	W	O	Color table 7
DFF190	COLOR08	W	O	Color table 8
DFF192	COLOR09	W	O	Color table 9
DFF194	COLOR10	W	O	Color table 10
DFF196	COLOR11	W	O	Color table 11
DFF198	COLOR12	W	O	Color table 12
DFF19A	COLOR13	W	O	Color table 13
DFF19C	COLOR14	W	O	Color table 14
DFF19E	COLOR15	W	O	Color table 15
DFF1A0	COLOR16	W	O	Color table 16
DFF1A2	COLOR17	W	O	Color table 17, color #1 of sprite #0 & #1
DFF1A4	COLOR18	W	O	Color table 18, color #2 of sprite #0 & #1
DFF1A6	COLOR19	W	O	Color table 19, color #3 of sprite #0 & #1
DFF1A8	COLOR20	W	O	Color table 20
DFF1AA	COLOR21	W	O	Color table 21, color #1 of sprite #2 & #3
DFF1AC	COLOR22	W	O	Color table 22, color #2 of sprite #2 & #3
DFF1AE	COLOR23	W	O	Color table 23, color #3 of sprite #2 & #3
DFF1B0	COLOR24	W	O	Color table 24
DFF1B2	COLOR25	W	O	Color table 25, color #1 of sprite #4 & #5
DFF1B4	COLOR26	W	O	Color table 26, color #2 of sprite #4 & #5
DFF1B6	COLOR27	W	O	Color table 27, color #3 of sprite #4 & #5
DFF1B8	COLOR28	W	O	Color table 28
DFF1BA	COLOR29	W	O	Color table 29, color #1 of sprite #6 & #7
DFF1BC	COLOR30	W	O	Color table 30, color #2 of sprite #6 & #7
DFF1BE	COLOR31	W	O	Color table 31, color #3 of sprite #6 & #7
DFF1C0	HTOTAL	W	E	Highest number count, horiz line (VARBEAMEN=1)
DFF1C2	HSSTOP	W	E	Horizontal line position for HSYNC stop
DFF1C4	HBSTRT	W	E	Horizontal line position for HBLANK start
DFF1C6	HBSTOP	W	E	Horizontal line position for HBLANK stop
DFF1C8	VTOTAL	W	E	Highest numbered vertical line (VARBEAMEN=1)
DFF1CA	VSSTOP	W	E	Vertical line position for VSYNC stop
DFF1CC	VBSTRT	W	E	Vertical line for VBLANK start
DFF1CE	VBSTOP	W	E	Vertical line for VBLANK stop
DFF1D0	SPRHSTRT	W	E	UHRES sprite vertical start
DFF1D2	SPRHSTOP	W	E	UHRES sprite vertical stop
DFF1D4	BPLHSTRT	W	E	UHRES bit plane vertical start
DFF1D6	BPLHSTOP	W	E	UHRES bit plane vertical stop
DFF1D8	HHPOSW	W	E	DUAL mode hires H beam counter write
DFF1DA	HHPOSR	R	E	DUAL mode hires H beam counter read
DFF1DC	BEAMCON0	W	O	Beam counter control register (SHRES,UHRES,PAL)
DFF1DE	HSSTRT	W	E	Horizontal sync start (VARHSY)
DFF1E0	VSSTRT	W	E	Vertical sync start (VARVSY)
DFF1E2	HCENTER	W	E	Horizontal position for Vsync on interlace
DFF1E4	DIWHIGH	W	E	Display window - upper bits for start/stop
DFF1E6	BPLHMOD	W	E	UHRES bit plane modulo
DFF1E8	SPRHPTH	W	E	UHRES sprite pointer (high 5 bits)
DFF1EA	SPRHPTL	W	E	UHRES sprite pointer (low 15 bits)
DFF1EC	BPLHPTH	W	E	VRam (UHRES) bitplane pointer (hi 5 bits)
DFF1EE	BPLHPTL	W	E	VRam (UHRES) bitplane pointer (lo 15 bits)
DFF1F0	RESERVED	-	-	 
DFF1F2	RESERVED	-	-	 
DFF1F4	RESERVED	-	-	 
DFF1F6	RESERVED	-	-	 
DFF1F8	RESERVED	-	-	 
DFF1FA	RESERVED	-	-	 
DFF1FC	FMODE	W	A	Fetch mode register
DFF1FE	NO-OP	R	O	No operation/NULL (Copper NOP instruction)
