La derni\u00e8re version b\u00e9ta publique de l’excellent WinUAE, l’\u00e9mulateur Commodore Amiga.<\/p>\n
T\u00e9l\u00e9charger WinUAE (Public Beta) [32 bits] v3.3.0 Beta 11 (4,2 Mo)<\/a><\/p>\n T\u00e9l\u00e9charger WinUAE (Public Beta) [64 bits] v6.1.0 Beta 11 (7.6 Mo)<\/a><\/p><\/p>\n T\u00e9l\u00e9charger WinUAE (Public Beta) [32 bits] v6.1.0 Beta 8 FR (5.5 Mo)<\/a><\/p><\/p>\n T\u00e9l\u00e9charger WinUAE (Public Beta) [64 bits] v6.1.0 Beta 8 FR (8.0 Mo)<\/a><\/p><\/p>\n
\n– Screenshot\/capture without \u00ab\u00a0before filtering\u00a0\u00bb ticked now uses much faster GetRenderTargetData() function in D3D mode to capture the output.
\n– Ticked 68060 unimplemented CPU emu checkbox also enabled 68030 MMU instructions.
\n– Terminate indirect UAE Boot ROM trap threads before unmapping Amiga side memory to prevent random crashes when exiting emulator with traps active.
\n– Debugger il mask is now accepted in two 32-bit parts, 64-bit values are not supported by debugger input.
\n– Added gfx_black_frame_insertion_ratio config entry, sets timing between normal and black frames in adaptive sync mode. Default is 50 (50%, normal and black frames have same duration).
\n– CD32 emulation updates, mostly previously unknown undocumented features:
\n* – It seems unmapped addresses don’t \u00ab\u00a0float\u00a0\u00bb, all invalid reads seem to always return zeros.
\n* – CIA chip select, address bits 12 and 13 are CIA selects. Gary: 0=none,1=A,2=B,3=A+B, Gayle: 0=none,1=A,2=B,3=none, Akiko: 0=A,1=A,2=B,3=B (Very unexpected)
\n* – CIA address space: Gary: $A00000-$BFFFFF, Gayle: $BFDxxx and $BFExxx, Akiko: $BFE000-$BFFFFF.
\n* – Custom register mirror at $B90000-$B9FFFF! (This is really weird..)
\n* – Usual custom register mirror at $C00000-$CFFFFF.
\n* – Akiko addresses are mapped from $B80000 to $B87FFF (was $B8FFFF) and has 64 byte mirroring (was no mirroring)
\n* – Akiko ID at $B80000.l is $C0CACAFE (was only $CAFE at $B80002.w, KS checks this address for $CAFE)
\n* – All write-only registers seem to read same data as nearby read-only register.
\n* – Interrupt registers only have bits 24 to 31 writable, other bits always read as zeros.
\n* – Config ($B80024) register has bits 23 to 31 writable, other bits always read as zeros.
\n* – Subchannel arrived interrupt bit is set at boot for some unknown reason, subchannel index register ($B80018) works strangely and has unexpected value at boot ($C2).
\n* – Match Akiko C2P behavior with real hardware when reading bytes\/words or when doing multiple read passes.
\n* – When booted with CD inserted: first packet from CD MCU is always \u00ab\u00a0media inserted\u00a0\u00bb packet.
\n* – $B80028.b reads last received command packet byte.
\n* – Writing to $B80028.b sends command bytes to CD MCU. (This is not emulated yet and no program uses it)
\n* – Akiko internal CIAs don’t have external TOD input pins. CIA-A TOD which normally counts vsyncs or power supply ticks count rate is selected with $B80020 bit 23 (0=50Hz, 1=60Hz). CIA-B (hsync) timing logic is not known yet but it is also internally generated.
\n* – Old interrupt request set\/clear hacks removed.
\n* – All CD status return codes (including errors) include door status (open\/closed) in bit 0.
\n* – Contents of unused TOC entry bytes now contain real hardware matching values. <\/em>
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\nSource: Forum des versions Betas<\/a>.<\/p>\n