[Ordi.] 88VA Eternal Grafx (22/10/06)

CPU:
– Way V30 at the time of mode, bit15-12, bit1 of flag register it becomes 1 fixing, operational abnormality of the correction single step interruption the operation of POP SP at the time of correction

V30 mode correction graphics:
– When pattern changing the register to 8bit, the problem where
value of port 550h and 552h is not reset the territory where the
correction split screen does not exist become transparent, with color
of pallet 0 indication �� �� problem correction